Design, Development, Benchmarking and Evaluation of Parallel Applications for High Performance Embedded Systems

摘要

Due to the nature of the algorithms typically employed in applications such as STAP, sensor data fusion, and target detection, it was decided to integrate the signal processing areas of space time adaptive processing and signal detection. In particular, the following algorithms were parallelized: (1) AFRL (Rome) version of a PEI staggered post-Doppler STAP algorithm. This algorithm, comprised of more than 23,000 lines of code, included the steps of (a) Doppler filter processing, (b) weight computation, (c) beam forming, (d) pulse compression, and (e) constant false alarm rate (CFAR) processing. (2) Ozturk (clutter characterization) algorithm. This algorithm is used to analyze random data and includes the steps of (a) goodness of fit test and (b) probability distribution approximation. (3) Ordered statistic CFAR algorithm. This CFAR algorithm is in addition to the cell averaging CFAR algorithm contained in the PRI staggered post-Doppler STAP algorithm. In carrying out the algorithm parallelizations, the following tasks/technical requirements were accomplished: (1) Efficient techniques for high speed, high volume I/O applicable to embedded high performance systems were designed and implemented. (2) Data distribution and redistribution strategies for both inter- task and intra-task data communications in real time pipelined and parallelized applications were designed and implemented. (3) A documented beta code release was implemented to illustrate the full system with all major functional, technical, programming, documentation, installation, and user application features to be included in the full delivery. (4) The individual algorithms, as well as the integrated applications, were implemented, demonstrated, benchmarked, and evaluated on the Intel Parago and, IBM SP2.