System Synthesis for Polymorphous Computing Architectures

摘要

In general, polymorphous computing architectures are architectures that can be dynamically customized to various applications. This report is concerned with metrics, formulations, and algorithms for systematically synthesizing architectural configurations and software for such architectures, particularly in the domain of digital signal processing (DSP). In polymorphous system synthesis for DSP, one central aspect is managing trade-offs between latency and throughput, which are critical metrics for DSP applications. In Sections 1-4 of the report, we develop a model for latency that is more appropriate than conventional models of latency for DSP system synthesis, and that takes into account central issues related to transient-state time, and we develop precise relationships between latency and throughput using this framework. Schedule post-processing strategies based on simulation and retiming that reduce the latency and transient for a given throughput constraint are then presented, and their efficacy is substantiated with experimental results on a number of practical DSP benchmarks. Also, a streamlined approach based on a graph-theoretic framework is suggested that leads to much faster execution of the proposed schedule post-processing techniques. Sections 5-6 of the report then deal with the problem of efficient mapping of an application with stochastic execution times to a polymorphous computing architecture in accordance with the time-varying performance requirements for several metrics, which may include even non-trivial metrics such as the coupled latency/throughput metrics that are addressed earlier in the report. A comprehensive model for system synthesis in this context is developed; results are developed on the complexity of system synthesis under this model; and preliminary algorithms that address the synthesis problem are presented, and evaluated experimentally.