Transition Count Testing of Combinational Logic Circuits.

摘要

Logic circuits are usually tested by applying a sequence of input patterns S to the circuit under test and comparing the observed response sequence R bit by bit to the expected response R0. The transition count (TC) of R, denoted c(R), is the number of times the signals forming R change value. In TC testing c(R) is recorded rather than R. A fault is detected if the observed TC c(R) differs from the correct TC c(R0). This paper presents a formal analysis of TC testing.