Design, Fabrication and Test of a CCD-Based Correlator/Convolver

摘要

Tests conducted since the first interim report have emphasized the characterization of the elements of the correlator/convolver, rather than the performance of the complete device. Prior work having vindicated the choice of the four transistor bridge configuration, the present interim period focused on the adequacy of the floating gate and source followers as designed. An extensive characterization of the floating-gate-output CCD test pattern was carried out. Maximum signal swing, linearity and noise level were measured with four different input techniques. All results were as good or better than expected. Accuracy of about one percent could be maintained over a signal range of about 4.25 volts. Surprisingly, the potential equilibration techniques gave linearity at least as good as that obtained with the diode-cutoff method. However, the potential equilibration input was up to 15 dB quieter. The signal to noise ratio referenced to the 1% nonlinearity signal level was approximately 80 dB, 10 dB better than the design goal. With the additional 6 dB enhancement of signal over noise of the bridge multiplier as compared to conventional multiplier designs, a net effective input signal to noise ratio of about 85 dB is expected in the complete correlator/convolver. Finally, the design of the deliverable 256-stage correlator was completed and entered into the maskmaking CAD system. The problem reported earlier with direct feedthrough of the drain inputs was found to be due to a difference in characteristics between transistors located under one and under two layers of polysilicon and will be corrected in this final design.