Effect of Dislocations on Gallium Arsenide FETs

摘要

Indium doping at 5 x 10 to the 19th power/cc was found to be optimum for the growth of low-dislocation GaAs crystals, and to avoid constitutional supercooling effects. Dislocation etch pit densities of near 200/cc were measured in the central region of In-doped crystals, increasing to above 1000/sq cm in the peripheral regions. Based on the concept that dislocations are generated to relieve excess thermoelastic stress, a preliminary thermal model was used to design a hot zone shield to reduce thermal gradients during growth. An optimum combination of indium-doping, reduced thermal gradient growth, and appropriate growth parameters are expected to yield completely dislocation-free GaAs crystals. A FET metrology mask has been fabricated and preliminary FET device fabricaion begun, for evaluation of the effects of dislocations on FET device parameters. Twenty state-of-the-art, low dislocation, indium-doped GaAs wafers were delivered to the contractor for DARPA-related program evaluation.