Interface Lattice Engineering of Si Composite Wafers for Large-Format HgCdTe Infrared Focal Plane Arrays.

摘要

Mercury Cadmium Telluride (HgCdTe) is a material of great importance for infrared focal plane array applications. In order to produce large format detector arrays this material needs to be grown on a large area substrate, with silicon being the most mature substrate,it is the optimal choice for large format arrays. To help mitigate the effect of the lattice mismatch between the two materials, cadmium telluride (CdTe) is used as a buffer layer. The CdTe itself has nearly the same lattice mismatch (19.3%) to silicon, but due to the technological advantages it offers and compatibility with HgCdTe, it is the best buffer layer choice. The lattice mismatch between HgCdTe/CdTe and the silicon substrate leads to the formation of dislocations at densities in the mid 106 to low 107 cm-2 range in the epilayers. Such a high dislocation density greatly effects detector device performance quantities such as operability and sensitivity. Hence, the dislocation density should be brought down by at least an order of magnitude by adopting novel in situ and ex situ material processing techniques. In this work, in situ and ex situ thermal cycle annealing (TCA) methods have been used to decrease dislocation density in CdTe and HgCdTe.