Rewrite Rule Machine. Architectural Options and Testbed Facilities for the Rewrite Rule Machine

摘要

The Rewrite Rule Machine (RRM) project unites advanced architectural concepts with advanced software concepts. The unification is achieved through a novel model of computation, called concurrent tree rewriting, which supports both ultra high level programming and extreme concurrency of execution. This report presents some options for RRM implementation. We expect to use custom VLSI design to place many small processors on a single chip. With a suitable high-level architecture, this will allow unprecedented concurrency, with many thousands of small processors cooperating on a preduction task. Our performance estimate for a reasonable prototype is one million MIPS. The proposed RM architecture is described at four different levels. The individual tokens that constitute trees are stored in cells, while nodes consist of many cells with a common controller. Clusters include many nodes sharing a common name space for tokens, and several clusters together constitute the network level. Scalability and fault tolerance are also discussed, as is a testbed to ease the validation of architectural concepts. (Author)