Guidance, Navigation and Control Digital Emulation Technology Laboratory. Volume5. Task 5: GNC Processor Development and PFP Integration

摘要

The Georgia Tech GNC processor is being built from custom designed VLSI chips,which have been designed at Georgia Tech. This volume covers the board level designs, system packaging, integration of a prototype into the Parallel Function Processor (PFP) environment for testing, and plans for using the PFP to test a radiation hardened version of the processor being built by Harris Corporation. The simulation hardware in the DETL centers on the development, implementation, and use of the PFP. The PFP is a 64 processor digital computer for use in computationally intensive applications that can be partitioned into functional blocks. The processors are grouped in two 32 processor clusters running from one common host. Each 32 processor cluster is connected by a crossbar switch. All inter-processor communication takes place over the crossbar(s). Simultaneous transfers may take place independently and switch patterns may be changed every cycle. In order to program the machine correctly, all inter-processor communication and data transfer lengths must be known beforehand.