Design and Implementation of an Expander for the Hierarchical Real-TimeConstraints of Computer Aided Prototyping System (CAPS)

摘要

As part of developing the Execution Support System of Computer-Aided PrototypingSystem (CAPS), there is a need to translate and schedule prototypes of hard real time systems whose specifications are defined in a hierarchical structure by using the Prototyping System Description Language (PSDL). We present a design and implementation of a PSDL expander in this thesis. The expander translates a PSDL prototype with an arbitrarily deep hierarchical structure into an equivalent two-level form that can be processed by the current implementations of the other CAPS tools. The design of the expander also provides for inheritance of timing constraints and static consistency checking. To establish a convenient representation of PSDL specifications, we define an Abstract Data Type (ADT) that provides an Ada representation of PSDL specification. The main idea behind the PSDL ADT is forming an abstract representation of PSDL to support software tools for analyzing, constructing, and translating PSDL programs. The PSDL ADT is built by using other common abstract data types, i.e. maps, sets, sequences, graphs, and stacks. The construction process of ADT itself is done by an LALR (1) parser, generated in Ada using the tools AYACC and AFLEX, a parser generator and a lexical analyzer.