Scanning Electron Microscopy Used to Measure the Feature Dimensions of a Nanoscale Test Pattern on a Silicon Surface

摘要

A method is proposed for nanoscale dimensional metrology with the scanning electron microscope in the case of an array of trapezoidal ridges on a silicon surface, the minimum feature size being comparable with the effective beam diameter. The method is tested by measuring the top width of an individual ridge, which lies between 14 and 24 nm. The method works at accelerating voltages higher than 15 kV.