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机译:
Institute of Solid State Electronics, Vienna University of Technology, Floragasse 7, 1040 Vienna, Austria;
机译:The Impact of Fringing Field on the Device Performance of a p-Channel Tunnel Field-Effect Transistor With a High- Gate Dielectric
机译:Impact of AlTaO Dielectric Capping on Device Performance and Reliability for Advanced Metal Gate/High-$k$ PMOS Application
机译:Impacts of Ti on electrical properties of Ge metal-oxide-semiconductor capacitors with ultrathin high-κ LaTiON gate dielectric
机译:Thermal processing impact on the integrity of HfO2-based high-k gate dielectrics