ULSI Wiring Formation by Copper Electroplating in the Presence of Additives

摘要

Damascene process has become a key technology as a manufacturing method of the semiconductor devices. In this research, copper filling of submicron vias and trenches on the silicon wafer by copper electroplating was examined. Complete void-free copper filling of submicron width trenches was obtained by the addition of polyethylene glycol (PEG) and bis (3-sulfopropyl) disulfidedisodium (SPS) as the additives to the copper electroplating bath. However, the overplate phenomenon was often observed in this case. This phenomenon may cause the improper polishing on the following chemical and mechanical polishing process (CMP). This paper describes the effect of additives on the copper filling by electroplating and eliminates the overplate phenomenon by the combination of the additives.