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On the Effects of Transient Electromagnetic Interference on Integrated Circuits

机译:暂态电磁干扰对集成电路的影响

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摘要

Semiconductor devices are often the source, as well as the victim, of electromagnetic interference (Fig. 1). Possible mechanisms for coupling of electromagnetic noise include wire connections such as the supply lines, coupling of the package leads to electric or magnetic fields, or even coupling of the fields directly to the silicon chip. Susceptibility to electromagnetic noise has played a significant role in the design of ICs for many years. Although ICs have efficient protection structures against transient disturbances such as electrostatic discharge (ESD), the IC may withstand less and less electrical noise on power and signal pins due to a continuous decrease of supply voltage. The usual noise margin is ±20% of the nominal supply voltage. In modern 90 nm CMOS processes, the supply voltage of 1 V leads to a ±200 mV noise margin. The amount of noise required to cause a malfunction can vary widely from one IC design to another.
机译:半导体器件通常是电磁干扰的源头和受害者(图1)。电磁噪声耦合的可能机制包括导线连接(例如电源线),封装引线耦合到电场或磁场,或者甚至将场直接耦合到硅芯片。多年来,电磁噪声的敏感性在IC设计中起着重要作用。尽管IC具有针对瞬态干扰(例如静电放电(ESD))的有效保护结构,但由于电源电压的持续降低,IC可能会承受越来越少的电源和信号引脚上的电噪声。通常的噪声容限为标称电源电压的±20%。在现代的90 nm CMOS工艺中,电源电压为1 V会导致±200 mV的噪声裕量。从一种IC设计到另一种IC设计,引起故障所需的噪声量可能相差很大。

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