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AN FPGA HARDWARE/SOFTWARE CO-DESIGN TOWARDS EVOLVABLE SPIKING NEURAL NETWORKS FOR ROBOTICS APPLICATION

机译:FPGA硬件/软件共同设计,可为机器人应用发展可扩展的脉冲神经网络

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摘要

This paper presents an approach that permits the effective hardware realization of a novel Evolvable Spiking Neural Network (ESNN) paradigm on Field Programmable Gate Arrays (FPGAs). The ESNN possesses a hybrid learning algorithm that consists of a Spike Timing Dependent Plasticity (STDP) mechanism fused with a Genetic Algorithm (GA). The design and implementation direction utilizes the latest advancements in FPGA technology to provide a partitioned hardware/software co-design solution. The approach achieves the maximum FPGA flexibility obtainable for the ESNN paradigm. The algorithm was applied as an embedded intelligent system robotic controller to solve an autonomous navigation and obstacle avoidance problem.
机译:本文提出了一种方法,该方法可以在现场可编程门阵列(FPGA)上有效地实现新型的可扩展尖峰神经网络(ESNN)范例的硬件。 ESNN拥有一种混合学习算法,该算法由与时序算法(STDP)机制和遗传算法(GA)融合而成的。设计和实施方向利用了FPGA技术的最新进展,以提供一种分区的硬件/软件协同设计解决方案。该方法实现了ESNN范例可获得的最大FPGA灵活性。该算法被用作嵌入式智能系统机器人控制器,以解决自主导航和避障问题。

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