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Design of Digital and Analog Controlled System with Improved Throughput

机译:吞吐量提高的数字模拟控制系统设计

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In this work voltage converter is deployed in order to reduce the power consumption, power dissipation and switching power in all the practical applications. It present step down voltage converter in which analog to digital converter is used at the feedback for the reduced switching level. This will further feed the output to a digital converter where in turns losses be reduced. At the light loading the control loop operates in the pulse skipping mode. In case of heavy loading it operates in frequency modulation mode (FMM). For achieving this new algorithm of VDC (Voltage Direct Conversion) algorithm is proposed. It frequency ranges from 31.25 kHz to 1.5 MHz and more can it be operated. The design is layout in a 180 nm CMOS technology using cadence virtuoso tool.
机译:为了降低所有实际应用中的功耗,功耗和开关功率,部署了电压转换器。它提出了一种降压转换器,其中在反馈处使用模数转换器以降低开关电平。这将进一步将输出馈送到数字转换器,从而减少损耗。在轻负载下,控制环路以脉冲跳跃模式运行。如果负载很重,它将以频率调制模式(FMM)运行。为了实现这一新算法,提出了VDC(电压直接转换)算法。它的频率范围是31.25 kHz至1.5 MHz,并且可以工作更多。该设计是使用cadence virtuoso工具在180 nm CMOS技术中进行布局的。

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