Image processing, Digital signal processing (DSP), Graphics, Robotics and different control algorithms like adaptive control, model predictive control (MPC), use the matrix operations extensively. FPGA based technology, allows easy reprogramability, less development time with respect to full custom VLSI design. In all the above mentioned applications, matrix multiplication plays an important role. Because these operations are vital, and processors implement matrix multiplication in O(n~3) run-time, many parallel methods have been developed to reduce this complexity. Matrix multiplication is a fundamental building block for many applications including image processing, coding, and digital signal processing. This work presents a non symmetric resource efficient methodology for implementing integer and floating point matrix multiplication using FPGAs in the face recognition systems.
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