Image processing using a universal nonlinear cell and the WARP wafer

摘要

Silicon implementation of many image processing algorithms has been hindered in the past due to their complexity and computational volume. This paper discusses two such algorithms, namely the 'Hough transform for detection of line segments,' and 'Backprojection in CT image reconstruction' as well as their wafer scale implementation. To gain a significant speed advantage, we use an advanced multi-function cell for performing any one of four nonlinear operations: (1) square-root, (2) reciprocal, (3) sine/cosine, and (4) arctangent-all realized in a single chip, available on a selectable basis. A 16 bit four-function "one cycle" VLSI chip, fabricated in 2.0 /spl mu/m CMOS technology, is presently available which outputs a new result every clock cycle. Also discussed briefly is a "two-cycle" 24 bit chip, which delivers a new result every two clock cycles. Using this nonlinear cell an application level Hough transform module is developed. On a 4" WARP wafer, using 2.0 /spl mu/m CMOS technology, eight such Hough modules can be configured, so as to produce the Hough transform of a 1024/spl times/1024 image in an estimated 11 ms. Similarly, six CT modules, placed on three wafers, can result in the backprojected image in 87 ms. Corresponding numbers for 1.0 /spl mu/m technology are estimated at 2 ms for the Hough transform and 21 ms for the CT backprojected image because of higher clock rate and more processing cells on the wafers.