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首页> 外文期刊>Analog Integrated Circuits and Signal Processing >Validation of the sub-circuit modelling approach for substrate resistance in 0.13μm RF MOSFETs
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Validation of the sub-circuit modelling approach for substrate resistance in 0.13μm RF MOSFETs

机译:验证0.13μm射频MOSFET中衬底电阻的子电路建模方法

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摘要

Great progress has been made on modelling the behaviour of deep-submicron MOS devices, especially concentrating on the performance and operation of the intrinsic device structures. To properly represent the RF performance of these devices, the extrinsic structure must also be considered and a variety of sub-circuit configurations, especially for the substrate, have been proposed. As the frequency of operation rises, it may be expected that more elaborate multielement substrate sub-circuits will become necessary. Here, we consider the RF operation of advanced 0.13 μm NMOS transistors up to 10 GHz and demonstrate that a simple sub-circuit, using only a single resistor, allows accurate simulation of the two-port parameters, including y{sub}22. We thus demonstrate that the single-resistor substrate sub-circuit approach remains a simple, yet valid, modelling option for MOS simulation up to 10 GHz.
机译:在对深亚微米MOS器件的行为进行建模方面取得了巨大的进步,特别是专注于本征器件结构的性能和操作。为了正确表示这些设备的RF性能,还必须考虑外部结构,并且已经提出了各种子电路配置,尤其是针对衬底的子电路配置。随着操作频率的增加,可以预期将需要更精细的多元件衬底子电路。在这里,我们考虑了高达10 GHz的先进0.13μmNMOS晶体管的RF操作,并证明了仅使用单个电阻器的简单子电路就可以精确模拟包括y {sub} 22在内的两个端口参数。因此,我们证明了单电阻衬底子电路方法仍然是用于高达10 GHz的MOS仿真的简单但有效的建模选项。

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