Configurable DRAM macro design for 2,112 derivative organizations to be synthesized using memory generator

摘要

One-chip integrated technology for the DRAM and logic circuit is an effective solution for realizing a high-performance system LSI. Toshiba has produced a dRAMASIC{sub}TM, in which a DRAM macro can be embedded in an application-specific IC (ASIC).We have now developed a DRAM macro which is suitable as a memory generator. The memory generator can composite various configurations of embedded DRAM macro in a short turnaround time for the ASIC. The size of the DRAM macro generated by the memorygenerator is comparable to that of a manually designed DRAM. We have fabricated 4 Mbit and 20 Mbit DRAM macros using a memory generator and 0.35μm technology.