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Dependence of Pentacene Crystal Growth on Dielectric Roughness for Fabrication of Flexible Field-Effect Transistors

机译:并五苯晶体生长对介电粗糙度的依赖性,用于制造柔性场效应晶体管

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The dependence of pentacene nanostructures on gate dielectric surfaces were investigated for flexible organic field-effect transistor (OFET) applications. Two bilayer types of polymer/aluminum oxide (Al2O3) gate dielectrics were fabricated on commercial Al foils laminated onto a polymer back plate. Some Al Foils were directly used as gate electrodes, and others were smoothly polished by an electrolytic etching. These Al surfaces were then anodized and coated with poly(α-methyl styrene) (PAMS). For PAMS/ Al2O3 dielectrics onto etched Al foils, surface roughness up to -1 nm could be reached, although isolated dimples with a lateral diameter of several micrometers were still present. On PAMS/Al2O3 dielectrics (surface roughness >40 nm) containing mechanical grooves of Al foil, average hole mobility (μ_(FET)) of 50 nm thick pentacene-FETs under the low operating voltages (|v| < 6 V) was 0.15cm~2 V~(-1) s~(-1).In contrast. pentacene-FETs employing the etched Al gates exhibited μ_(FET) of ~ 0.39 cm V~(-1) s~(-1) . which was comparable to that of reference samples with PAMS/Al2O3 dielectrics onto flat sputtered Al gates. Conducting-probe atomic force microscopy and two-dimensional X-ray diffraction of pentacene Films with various thicknesses revealed different out-of-plane and in-plane crystal orderings of pentacene, depending on the surface roughness of the gate dielectrics.
机译:研究了并五苯纳米结构对栅极介电表面的依赖性,以用于柔性有机场效应晶体管(OFET)应用。在层压到聚合物背板上的商用铝箔上制造了两种双层类型的聚合物/氧化铝(Al2O3)栅极电介质。一些铝箔直接用作栅电极,而其他铝箔则通过电解蚀刻平滑抛光。然后将这些铝表面进行阳极氧化处理并涂上聚(α-甲基苯乙烯)(PAMS)。对于在蚀刻的铝箔上的PAMS / Al2O3电介质,虽然仍然存在横向直径为几微米的孤立凹窝,但表面粗糙度最高可达-1 nm。在包含铝箔机械沟槽的PAMS / Al2O3电介质(表面粗糙度> 40 nm)上,在低工作电压(| v | <6 V)下,厚度为50 nm的并五苯FET的平均空穴迁移率(μ_(FET))为0.15 cm〜2 V〜(-1)s〜(-1)。采用蚀刻的Al栅极的并五苯FET的μ_(FET)为〜0.39 cm V〜(-1)s〜(-1)。与具有PAMS / Al2O3电介质到平坦溅射的Al栅极上的参考样品相当。并五苯薄膜的导电探针原子力显微镜检查和二维X射线衍射显示,并五苯并苯的面外和面内晶体有序不同,具体取决于栅极电介质的表面粗糙度。

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