首页> 外文期刊>Journal of Micromechanics and Microengineering >Realize multiple hermetic chamber pressures for system-on-chip process by using the capping wafer with diverse cavity depths
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Realize multiple hermetic chamber pressures for system-on-chip process by using the capping wafer with diverse cavity depths

机译:通过使用具有多样化腔深度的封盖晶片来实现用于片上芯片工艺的多个密封室压力

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Many mechanical and thermal characteristics, for example the air damping, of suspended micromachined structures are sensitive to the ambient pressure. Thus, micromachined devices such as the gyroscope and accelerometer have different ambient pressure requirements. Commercially available process platforms could be used to fabricate and integrate devices of various functions to reduce the chip size. However, it remains a challenge to offer different ambient pressures for micromachined devices after sealing them by wafer level capping (WLC). This study exploits the outgassing characteristics of the CMOS chip to fabricate chambers of various pressures after the WLC of the Si-above-CMOS (TSMC 0.18 mu m 1P5M CMOS process) MEMS process platform. The pressure of the sealed chamber can be modulated by the chamber volume after the outgassing. In other words, the pressure of hermetic sealed chambers can be easily and properly defined by the etching depth of the cavity on an Si capping wafer. In applications, devices sealed with different cavity depths are implemented using the Si-above-CMOS (TSMC 0.18 mu m 1P5M CMOS process) MEMS process platform to demonstrate the present approach. Measurements show the feasibility of this simple chamber pressure modulation approach on eight-inch wafers.
机译:许多机械和热特性,例如空气阻尼,悬浮的微机械结构对环境压力敏感。因此,诸如陀螺仪和加速度计的微机械装置具有不同的环境压力要求。可商购的过程平台可用于制造和集成各种功能的设备以降低芯片尺寸。然而,在通过晶片水平封盖(WLC)密封它们之后为微机械装置提供不同的环境压力仍然是一个挑战。该研究利用CMOS芯片的除气特性,以在Si-oder-CMOS(TSMC0.18μm1p5mCMOS过程)MEMS工艺平台的WLC之后制造各种压力的腔室。密封室的压力可以通过在除气后的腔室容积来调节。换句话说,通过Si覆盖晶片上的腔的蚀刻深度可以容易且适当地限定气密密封腔室的压力。在应用中,使用Si-上上CMOS(TSMC0.18μm1P5MCMOS处理)MEMS处理平台来实现用不同腔深度密封的装置,以展示本方法。测量表明,这种简单的腔室压力调制方法在八英寸晶圆上的可行性。

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