Novel Tree Structure Based Conservative Reversible Binary Coded Decimal Adder and Sequential Circuit with Added High Testability

摘要

Reversible logic has been recognized as one of the most promising technique for the realization of the quantum circuit. In this paper, a cost effective conservative, reversible binary coded decimal (BCD) adder is proposed for the quantum logic circuit. Towards the realization of BCDadder, few novel gates, such as Half-Adder/Subtraction (HAS-PP), Full-Adder/Subtraction (FAS-PP) and Overflow-detection (OD-PP) based on parity preserving logic are synthesized which incurs 7, 10 and 13 quantum cost respectively. Coupling these gates a novel tree-based methodology is proposedto implement the required BCD Adder. Also, the BCD adder design has been optimized to achieve the optimum value of quantum cost. In addition, the proposed BCD circuit is extended to n-bit adder using replica based techniques. Experimental result establishes the novelty of the proposedlogic, which outperforms the conventional circuits in terms of logic synthesis and testability. The limitation of detecting the missing gate and missing control point of the quantum circuit of overflow detection is finally tackled this work by the proposed OD-PP with the application of theminimum test vector. In addition, reversible circuits of control inputs based testable master-slave D-FF is intended. The noted work on the testable sequential circuit presented here is to develop circuit using minimum test vectors and can find diverse application in the testing paradigm.