Electronic digit addition circuit for binary coded decimal numbers - contains value 5 processing dual full adder, adder stage not requiring additional carry processing input

摘要

An electronic digit addition circuit for binary coded decimal numbers contains a dual full adder (3) for value 5 processing and a circuit which separates the number 5 in the input region for the units sums 6 or 8 for orocessing in the dual full adder. For the units sum 4, a carry is processed so that a gate circuit's pre-control is interrupted and the dual full adder for value 5 processing is driven with a high potential at one input. ADVANTAGE - Adder stage requires no additional carry processing input.