Synthesis, Characterization of Nanoscale Lanthanum Aluminate and Simulation of Nanoscale Metal Oxide Semiconductor Devices

摘要

The zeal to allow much higher density of logic gates/logic functions on extremely small chip, needed to scale down the Complementary Metal Oxide Semiconductor (CMOS) transistors to nano scale (1 nm to 100 nm). Thus the scaling of CMOS transistor requires replacement of the conventional silica gate oxide (SiO_2) or oxy nitride (SiON) with a higher dielectric constant (K) gate dielectric to minimize the leakage current and to maintain a large capacitance especially at nano level to escape Quantum Mechanical Tunneling. Among several contenders, lanthanum aluminium oxide/lanthanum aluminate (LaAIO_3) is the suitable successor of the conventional gate dielectric as it combines the advantages of high dielectric constant of lanthana (La_2O_3) and chemical, thermal stability of alumina (Al_2O_3). Hence synthesis of lanthanum aluminate nanoparticles was done by Gelation-Precipitation method and were characterized by X ray Diffractometer (XRD), Particle Size Analyzer (PSA), Thermo Gravimetry/Differential Thermal Analysis (TG/DTA), Scanning Electron Microscopy (SEM) and Transmission Electron Microscopy (TEM). We also present a work on simulation of two Metal Oxide Semiconductor Field Effect Transistors (MOSFETs)-one with nano silica oxide layer and other with nano lanthanum aluminate oxide layer. We compare the I-V characteristics, Transmission spectra and conductance of both the MOSFETs to show that the output current of MOSFET using nano LaAIO_3 oxide layer is higher compared to that of the MOSFET using nano SiO_2 oxide layer.