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A voltage-mode RF DAC for massive MIMO system-on-chip digital transmitters

机译:用于大规模MIMO系统的芯片数字变送器的电压模式RF DAC

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摘要

As the number of antenna elements increases in massive multiple-input multiple-output-based radios such as fifth generation mobile technology (5G), designing true multi-band base-station transmitter, with efficient physical size, power consumption and cost in emerging cellular frequency bands up to 10 GHz, is becoming a challenge. This demands a hard integration of radio components, particularly the radio's digital application-specific integrated circuits (ASIC) with high performance multi-band data converters. In this work, a novel radio frequency digital-to-analog converter (RF DAC) solution is presented, that is also capable of monolithic integration into today's digital ASIC due to its digital-in-nature architecture. A voltage-mode conversion method is used as output stage, and configurable mixing logic is employed in the data path to create a higher frequency lobe and utilize the output signal in the first or the second Nyquist zone. This 12-bit RF DAC is designed in a 22 nm FDSOI CMOS process, and shows excellent linearity performance for output frequencies up to 10 GHz, with no calibration and no trimming techniques. The achieved linearity performance is able to fulfill the high requirements of 5G base-station transmitters. Extensive Monte-Carlo analysis is performed to demonstrate the performance reliability over mismatch and process variation in the chosen technology.
机译:随着天线元件的数量在大规模的多输入多输出的无线电增加,例如第五代移动技术(5G),设计真正的多频段基站发射机,具有高效的物理尺寸,功耗和新兴蜂窝的成本高达10 GHz的频段正在成为一个挑战。这需要具有高性能多频带数据转换器的无线电分量,特别是无线数字应用专用集成电路(ASIC)的硬集成。在这项工作中,提出了一种新颖的射频数模转换器(RF DAC)解决方案,这也能够由于其数字式架构而在今天的数字ASIC中的单片集成。电压模式转换方法用作输出级,并且可以在数据路径中采用可配置的混合逻辑以创建更高的频率叶片并利用第一或第二奈奎斯特区中的输出信号。该12位RF DAC设计成22nm FDSOI CMOS工艺,并为输出频率显示出高达10 GHz的优异线性性能,无校准和无修整技术。实现的线性性能能够满足5G基站发射器的高要求。进行广泛的Monte-Carlo分析,以证明所选技术中不匹配和过程变化的性能可靠性。

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