Morphological study on pentacene thin-film transistors: The influence of grain boundary on the electrical properties

摘要

We have prepared organic thin-film transistors (OTFTs) featuring pentacene molecules deposited at various substrate temperatures onto either hexamethyldisilazane (HMDS)-or poly(a-methylsyrene) (PaMS)-treated SiO2 surfaces. As a result, we obtained different grain boundary densities in the conducting channel. Since the surface-modified devices featured similar grain boundary densities in their active layers, but displayed different electrical performances, we suspected that different trap states probably existed at the grain boundaries for the two different kinds of OTFTs. In addition, the surface morphologies of the initial layers featured grain boundaries that were rather blurred for the thin films prepared on the PaMS-treated substrates, whereas shallow boundaries appeared for the pentacene layers on the HMDS-treated surfaces. Therefore, we deduced that the different surface treatment processes resulted in different Schwoebel (step-edge) barriers, and hence, different morphologies. These results suggested that different trap states existed at the grain boundaries of the two types of surface-treated devices, leading to variations in the electrical performance, even though the grain boundary densities were similar.