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Carbon nanotube growth for through silicon via application

机译:碳纳米管生长通过硅通孔应用

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摘要

Through silicon via (TSV) technology is key for next generation three-dimensional integrated circuits, and carbon nanotubes (CNT) provide a promising alternative to metal for filling the TSV. Three catalyst preparation methods for achieving CNT growth from the bottom of the TSV are investigated. Compared with sputtering and evaporation, catalyst deposition using dip-coating in a FeCl_2 solution is found to be a more efficient method for realizing a bottom-up filling of the TSV (aspect ratio 5 or 10) with CNT. The CNT bundles grown in 5 min exceed the 50 μm length of the TSV and are multi-wall CNT with three to eight walls. The CNT bundles inside the TSV were electrically characterized by creating a direct contact using a four-point nanoprober setup. A low resistance of the CNT bundle of 69.7 Ω (297 Ω) was measured when the CNT bundle was contacted midway along (over the full length of) the 25 μm deep TSV. The electrical characterization in combination with the good filling of the TSV demonstrates the potential use of CNT in fully integrated TSV applications.
机译:硅穿孔(TSV)技术是下一代三维集成电路的关键,而碳纳米管(CNT)为填充TSV的金属提供了有希望的替代方法。研究了三种从TSV底部实现CNT生长的催化剂制备方法。与溅射和蒸发相比,使用浸涂法在FeCl_2溶液中沉积催化剂被发现是实现CNT自底向上填充TSV(纵横比为5或10)的更有效方法。在5分钟内生长的CNT束超过了TSV的50μm长度,并且是具有三到八个壁的多壁CNT。通过使用四点纳米探针设置直接接触,对TSV内部的CNT束进行电学表征。当沿着25微米深的TSV(在整个长度上)中途接触CNT束时,测得CNT束的低电阻为69.7Ω(297Ω)。电气特性与TSV的良好填充相结合证明了CNT在完全集成的TSV应用中的潜在用途。

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