Effect of silicon surface roughness on 3-D MOS capacitor with ultrathin HfON gate insulator formed by ECR plasma sputtering

摘要

In this paper, the effect of silicon surface roughness on three-dimensional (3-D) MOS capacitor with ultrathin hafnium oxynitride (HfON) gate insulator formed by electron cyclotron resonance (ECR) plasma sputtering was investigated. In order to improve the electrical characteristics of HfON gate insulator, interface roughness between HfON and Si substrate should be reduced. The root-mean-square (RMS) roughness for the surface of line region without (w/o) annealed 3-D Si (0.21 nm) was decreased to 0.10 nm for Ar/4.9%H_2 annealed at 1000℃. The HfON was formed by the 2 nm thick HfN followed by the Ar/O_2 plasma oxidation. The 600℃ post deposition annealing (PDA) was carried out for 1 min in N_2 ambient. It was found that the flat Si surface makes the equivalent oxide thickness (EOT) (@ 100 kHz) smaller from 1.1 nm to 0.94 nm by reduction of Si surface roughness.