HfSiON-CMOSFET Technology for Low Operating Power/Low Standby Power Applications

摘要

This paper discusses major issues of HfSiON-CMOSFET from the viewpoints of device design and process integration. Well-known V{sub}(fb) shift and associated V{sub}(th) adjustment problem is discussed from perspective of both HfSiON film design and channel profile engineering. Issue of process integration such as catalyst action of Hf is also covered. Problems which might be essential to HfSiON-MOSFET such as mobility reduction and 2-dimensional effect at the gate edge are also discussed. Finally, we demonstrate HfSiON-CMOSFET for LSTP application which meets the specification of ITRS roadmap by optimizing device design and process integration.