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Embedded anti-aliasing in switched-capacitor ladder filters with variable gain and offset compensation

机译:具有可变增益和失调补偿的开关电容梯形滤波器中的嵌入式抗混叠

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摘要

A combination of continuous-time and switched capacitor integrators in a simulated LC loss-less ladder yields a response with suppressed aliasing without the use of continuous-time pro-filtering. Fabricated in a 0.35-μm CMOS process, a fifth order Cauer low-pass filter for a W-CDMA cellular phone receiver has a cut-off frequency of 1.92 MHz and aliasing suppression of better than 40 dB for 30.72-MHz sampling. Without using ally tuning mechanism, a ±10% accuracy of the cut off frequency is achieved. As additional features the filter has variable gain from -13.3 dB to 16.4 dB and an offset compensation mechanism. With the latter, a 50-mV DC offset added to the input is suppressed to 11 mV or less at the filter output under the maximum gain setting. The filter consumes 2.81 mA at 1.8-V power supply in a die area of 0.62 mm{sup}2.
机译:在模拟的LC无损耗阶梯中结合使用连续时间和开关电容器积分器,可以在不使用连续时间前级滤波的情况下获得抑制混叠的响应。用于W-CDMA蜂窝电话接收器的五阶Cauer低通滤波器采用0.35-μmCMOS工艺制造,其截止频率为1.92 MHz,对于30.72-MHz采样,混叠抑制优于40 dB。如果不使用自动调谐机制,则截止频率的精度为±10%。作为附加功能,滤波器具有从-13.3 dB到16.4 dB的可变增益和偏移补偿机制。对于后者,在最大增益设置下,在滤波器输出端将添加到输入的50mV DC偏移抑制到11mV或更小。该滤波器在0.62 mm {sup} 2的管芯面积中,在1.8V电源下消耗2.81 mA电流。

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