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首页> 外文期刊>Journal of nanoscience and nanotechnology >Quantum mechanical device modeling: FinFET having an isolated n+/p+ gate region strapped with poly-silicon
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Quantum mechanical device modeling: FinFET having an isolated n+/p+ gate region strapped with poly-silicon

机译:量子机械器件建模:FinFET具有隔离的n + / p +栅极区,并用多晶硅捆扎

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In this paper, we present our numerical study on FinFET having an isolated n+/p+ gate region strapped with metal and poly-silicon structure. Our theoretical work is based on 2-D quantum-mechanical simulator with a self-consistent solution of Poisson-Schrodinger equation. Our numerical simulation revealed that the threshold voltage (V-T) is controlled within -0.1 similar to+0.2 V with varying the doping concentration of the n+ and p+ polysilicon gate region from 1.0 X 10(17) to 1.0 X 10(18) cm(-3). We also confirmed that the better VT tolerance of the FinFET on the variation of the fin thickness can be expected over the conventional FinFET structure. For instance, the VT of the FinFET under this work exhibited 0.02 V tolerance with respect to the variation of the fin thickness change of 5 nm (from 30 to 35 nm) while the traditional FinFET demonstrates the tolerance of 0.12 V for the same variation of the fin thickness.
机译:在本文中,我们介绍了关于FinFET的数值研究,该FinFET具有一个隔离的n + / p +栅极区域,并带有金属和多晶硅结构。我们的理论工作基于2D量子力学模拟器,具有Poisson-Schrodinger方程的自洽解。我们的数值模拟结果表明,随着n +和p +多晶硅栅极区域的掺杂浓度从1.0 X 10(17)cm变为1.0 X 10(18)cm(+),阈值电压(VT)被控制在-0.1范围内,类似于+0.2V。 -3)。我们还证实,与传统的FinFET结构相比,可以预期FinFET在鳍厚度变化方面具有更好的VT容限。例如,在此工作下,FinFET的VT相对于5 nm鳍片厚度变化(从30到35 nm)的变化表现出0.02 V的容差,而传统的FinFET表现出相同的变化幅度为0.12 V的容差。散热片的厚度。

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