Gettering Strategies for SOI Wafers

摘要

Gettering strategies for iron in silicon-on-insulator (SOI) wafers are discussed. The hur-ied oxide layer in SOI wafers forms a diffusion barrier for transition metals and may substantially reduce the efficiency of traditional gettering techniques, such as internal gettering. It follows from the modeling results that at standard device processing temperatures one has to rely primarily on proximity gettering techniques, e.g., on heavily doped wells in the device area. In contrast, polysili-con might be a very efficient means for gettering in SOI wafers during high temperature anneals as our data indicate that iron segregates in polysilicon at temperatures above 1000 ℃.