Study of Read Recovery Dynamic Faults in 6T SRAMS and Method to Improve Test Time

摘要

Capturing dynamic and hard to detect faults in static embedded memories is a significant challenge for DFT designers. Not only it demands at-speed testing, it also requires a large number of operations (generally greater than 24 consecutive reads per memcell) on each memory cell, which is hard to achieve at lower testing budgets. We present a comprehensive study done on resistive defects which lead to read recovery faults in 6T memcell SRAMs. A novel DFT technique has been proposed using calibrated variation in dummy path of self timed memories to capture hard to detect resistive faults in small number of operations. Results show 89% reduction in test time for a robust test on an industrial SRAM with 2048 words operating at 400 MHz.