首页> 外文期刊>IEEE transactions on very large scale integration (VLSI) systems >CRC-Based Error Detection Constructions for FLT and ITA Finite Field Inversions Over GF(2m)
【24h】

CRC-Based Error Detection Constructions for FLT and ITA Finite Field Inversions Over GF(2m)

机译:基于CRC的FLT和ITA的错误检测结构,GF(2M)的FLT和ITA有限场倒置

获取原文
获取原文并翻译 | 示例

摘要

Binary extension finite fields GF(2(m)) have received prominent attention in the literature due to their application in many modern public-key cryptosystems and error-correcting codes. In particular, the inversion over GF(2(m)) is crucial for current and postquantum cryptographic applications. Schemes such as Fermat's little theorem (FLT) and the Itoh-Tsujii algorithm (ITA) have been studied to achieve better performance; however, this arithmetic operation is a complex, expensive, and time-consuming task that may require thousands of gates, increasing its vulnerability chance to natural defects. In this work, we propose efficient hardware architectures based on cyclic redundancy check (CRC) as error detection schemes for state-of-the-art finite field inversion over GF(2(m)) for a polynomial basis. To verify the derivations of the formulations, software implementations are performed. Likewise, hardware implementations of the original finite field inversions with the proposed error detection schemes are performed over Xilinx field-programmable gate array (FPGA) verifying that the proposed schemes achieve high error coverage with acceptable overhead.
机译:由于它们在许多现代公钥密码系统和错误校正代码中,二进制扩展有限字段GF(2(m))在文献中接受了突出的关注。特别地,GF(2(m))的反转对于电流和后定型加密应用至关重要。已经研究了诸如Fermat的小定理(FLT)和ITOH-Tsujii算法(ITA)的方案以实现更好的性能;然而,这种算术运算是一种复杂,昂贵,耗时的任务,可能需要数千个门,增加其脆弱性与自然缺陷的机会。在这项工作中,我们基于循环冗余校验(CRC)的高效硬件架构作为用于多项式的GF(2(M))的最先进的有限场反转的错误检测方案。为了验证配方的派生,执行软件实现。同样地,通过Xilinx现场可编程门阵列(FPGA)执行具有所提出的错误检测方案的原始有限场逆的硬件实现,验证所提出的方案以可接受的开销实现高误差覆盖。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号