A VLSI architecture for a real-time code book generator and encoderof a vector quantizer

摘要

Image compression applications use vector quantization (VQ) fornits high compression ratio and image quality. The current VQ hardwarenemploys static instead of dynamic code book generation as the latterndemands intensive computation and corresponding expensive hardware evennthough it offers better image quality. This paper describes a VLSInarchitecture for a real-time dynamic code book generator and encoder ofn512×512 images at 30 frames/s. The four-chip 0.8 Μm CMOS designnimplements a tree of Kohonen self-organizing maps, and consists of twonVQ processors and two image buffer memory chips. The pipelined VQnprocessor contains a computational core for both code book generationnand encoding, and is scalable to processing larger frames