Design and DCVS implementation of a self-checking bus-monitor unitfor highly reliable fault-tolerant system configurations

摘要

We present the design and implementation of a bus-monitor unitntargeted for the design of highly reliable fault-tolerant systems. Thenbus-monitor is designed using differential cascode voltage switch (DCVS)nlogic, whose inherent characteristics result in self-checking circuits.nIt is implemented in an application specific integrated circuit that cannbe used to implement a variety of fault-tolerant architectures includingntriple modular redundant and hybrid configurations. The unit is capablenof detecting and correcting failures in the redundant modules bynmonitoring their respective buses, and it delivers fault-free data tonthe destination modules. The unit is also capable of detecting faultsnoccurring in the unit itself by utilizing the fault secure properties ofnDCVS logic. In this paper, we present the operation of the bus-monitornunit and we describe its DCVS design and implementation, as well as thenperformance characteristics of the prototype chips. Finally, wenillustrate how the bus-monitor unit(s) can be used to implement highlynreliable fault-tolerant architectures, and we demonstrate thatnarchitectures designed using the developed unit(s) exhibit highernreliability compared to the ones implemented with CMOS logic, using thensame number of computational resources