Cut-based functional debugging for programmable systems-on-chip

摘要

Due to the growth of both design complexity and the number ofngates per pin, functional debugging has emerged as a critical step innthe development of a system-on-chip (SOC). Traditional approaches, suchnas system emulation and simulation, are becoming increasingly inadequatento address the system debugging needs. Design simulation is two to tennorders of magnitude slower than emulation and, thus, is used primarilynfor short, focused test sequences. Emulation has the required speed butnimposes strict limitations on signal observability and controllability.nWe introduce a new debugging approach for programmable SOC's thatnleverages the complementary advantages of emulation and simulation. Wenpropose a set of tools, transparent to both the design and debuggingnprocess, that enables the user to run long test sequences in emulationnand, upon error detection, roll back to an arbitrary instance innexecution time and switch over to simulation-based debugging for fullndesign visibility and controllability. The efficacy of the developednapproach is dependent upon the method for transferring the computationnfrom one execution domain to another. Although the approach can benapplied to any computational model, we have developed a suite ofnoptimization techniques that enable computation transfer in a mixednsynchronous data flow semi-infinite stream random-access machinencomputation model. This computation model is frequently used in manyncommunications and multimedia SOCs. The effectiveness of the developedndebugging methodology has been demonstrated on a set of multicorendesigns where combined emulation-simulation has been enabled with lownhardware and performance overhead