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首页> 外文期刊>IEEE transactions on very large scale integration (VLSI) systems >Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design
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Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design

机译:片上互连频率相关的R(f)L(f)对数字和RF设计的影响

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摘要

On-chip global interconnect exhibits clear frequency dependence in both resistance (R) and inductance ( L). In this paper, its impact on modern digital and radio frequency (RF) circuit design is examined. First, a physical and compact ladder circuit model is developed to capture this behavior, which only employs frequency independent R and L elements, and thus, supports transient analysis. Using this new model we demonstrate that the use of dc values for R and L is sufficient for timing analysis (i.e., 50% delay and slew rate) in digital designs. However, RL frequency dependence is critical for the analysis of signal integrity, shield line insertion, power supply stability, and RF inductor performance.
机译:片上全局互连在电阻(R)和电感(L)上都表现出明显的频率依赖性。本文研究了它对现代数字和射频(RF)电路设计的影响。首先,开发了一种物理且紧凑的梯形电路模型来捕获此行为,该模型仅采用独立于频率的R和L元素,因此支持瞬态分析。使用这个新模型,我们证明了在数字设计中,将R和L的dc值用于时序分析就足够了(即50%的延迟和压摆率)。但是,RL频率依赖性对于分析信号完整性,屏蔽线插入,电源稳定性和RF电感器性能至关重要。

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