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Throughput-Oriented NoC Topology Generation and Analysis for High Performance SoCs

机译:面向吞吐量的面向高性能SoC的NoC拓扑的生成和分析

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This paper presents a new approach to the design and analysis of NoC topologies which is based on the transaction-oriented communication methods of on-chip components. We propose two algorithms that attempt to meet the communication requirement of an on-chip application using a minimum number of network resources for the task, by generating application-specific topologies. In addition, to aid the design process of complex systems, the design method incorporates a form of predictive analysis which can estimate the degree of contention in a given system without performing detailed simulation. This predictive analysis method is used to determine the minimum frequency of operation for generated topologies, and is incorporated into the topology generation process. The proposed design method was tested using real-word applications, including an MPEG4 decoder and a Multi-Window Display application. The generated topologies were found to offer similar or better performance when compared with regular topologies. However, the topologies generated by our method were more economical, using, on average, half the network resources of regular topologies.
机译:本文提出了一种基于片上组件的面向事务的通信方法的NoC拓扑设计和分析的新方法。我们提出了两种算法,这些算法通过生成特定于应用程序的拓扑来尝试使用最少数量的网络资源来满足片上应用程序的通信需求。此外,为帮助复杂系统的设计过程,设计方法采用了一种预测分析形式,可以在不执行详细模拟的情况下估计给定系统中的竞争程度。此预测分析方法用于确定所生成拓扑的最小操作频率,并将其合并到拓扑生成过程中。使用包括MPEG4解码器和多窗口显示应用程序在内的实词应用程序对提出的设计方法进行了测试。与常规拓扑相比,发现生成的拓扑提供类似或更好的性能。但是,通过我们的方法生成的拓扑更经济,平均使用常规拓扑的一半网络资源。

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