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Enhancing the Performance of Symmetric-Key Cryptography via Instruction Set Extensions

机译:通过指令集扩展来增强对称密钥密码学的性能

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In this paper, instruction set extensions for a reduced instruction set computer processor are presented to improve the software performance of the data encryption standard (DES), the triple DES, the international data encryption algorithm (IDEA), and the advanced encryption standard (AES) algorithms. The most computationally intensive operations of each algorithm are off-loaded to a set of newly defined instructions. The additional hardware required to support these instructions is integrated into the processor's data path. For each of the targeted algorithms, comparisons are presented between traditional software implementations and new implementations that take advantage of the extended instruction set architecture. Results show that the utilization of the proposed instructions significantly reduces program code size, and improves encryption and decryption throughput. Moreover, the additional hardware resources required to support the instruction set extensions increase the total area of the processor by less than 65%. Finally, it will be shown that the throughputs for triple DES, IDEA, and AES are approximately the same when accelerated via instruction set extensions. This allows for seamless and transparent algorithm agility as one algorithm may be easily replaced by another algorithm with minimal performance degradation.
机译:本文针对简化的指令集计算机处理器提出了指令集扩展,以提高数据加密标准(DES),三重DES,国际数据加密算法(IDEA)和高级加密标准(AES)的软件性能。 )算法。每种算法的计算量最大的操作被卸载到一组新定义的指令上。支持这些指令所需的附加硬件已集成到处理器的数据路径中。对于每种目标算法,将在传统软件实现与利用扩展指令集体系结构的新实现之间进行比较。结果表明,对所提出指令的利用大大减少了程序代码的大小,并提高了加密和解密的吞吐量。此外,支持指令集扩展所需的额外硬件资源使处理器的总面积增加了不到65%。最后,将显示通过指令集扩展进行加速时,三重DES,IDEA和AES的吞吐量大致相同。这允许无缝和透明的算法敏捷性,因为一个算法可以很容易地被另一种算法替换,而性能下降却最小。

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