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Built-In Binary Code Inversion Technique for On-Chip Flash Memory Sense Amplifier With Reduced Read Current Consumption

机译:片内闪存读出放大器的内置二进制代码反转技术,可降低读取电流消耗

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The bit-line sense amplifier (S/A) for on-chip flash memory compares cell current with reference current to identify data that are programmed. The S/A for 0 (erased) cell data consumes a large sink current, which is greater than off-current for 1 (programmed) cell data. This brief proposes a built-in write/read path based on binary inversion methods to reduce the sensing current of S/A. An original binary code is programmed into flash memory with an inverted binary code based on the proposed bit inversion techniques. The de-inversion hardware, which is implemented with small logic gates to restore original binary data, only consumes logic current instead of analog sink current in the S/A. The proposed techniques are evaluated for the DSPStone benchmark and are applied to the modified S/A for ARM Cortex-M3-based microcontroller with 128-kB on-chip flash memory based on a 0.18-um EEPROM technology. The circuit-level simulation result for the DSPStone benchmark shows that a newly implemented chip with the S/A based on the proposed technique consumes approximately less than 22% of the operating power that conventional S/A uses.
机译:片上闪存的位线读出放大器(S / A)将单元电流与参考电流进行比较,以识别已编程的数据。 0个(擦除的)单元数据的S / A消耗较大的灌电流,该电流大于1个(编程的)单元数据的截止电流。该摘要提出了一种基于二进制反转方法的内置写/读路径,以减少S / A的检测电流。基于所提出的位反转技术,利用反转的二进制代码将原始的二进制代码编程到闪存中。使用小型逻辑门实现还原原始二进制数据的反转硬件仅消耗逻辑电流,而不消耗S / A中的模拟灌电流。所提议的技术已针对DSPStone基准进行了评估,并应用于基于ARM Cortex-M3的微控制器的改进S / A,该微控制器具有基于0.18um EEPROM技术的128kB片上闪存。 DSPStone基准测试的电路级仿真结果表明,基于所提出技术的具有S / A的新实现芯片消耗的能量大约不到传统S / A使用的22%的工作功率。

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