Accurate and Efficient On-Chip Spectral Analysis for Built-In Testing and Calibration Approaches

摘要

The fast Fourier transform (FFT) algorithm is widely used as a standard tool to carry out spectral analysis because of its computational efficiency. However, the presence of multiple tones frequently requires a fine frequency resolution to achieve sufficient accuracy, which imposes the use of a large number of FFT points that results in large area and power overheads. In this paper, an FFT method is proposed for on-chip spectral analysis of multi-tone signals with particular harmonic and intermodulation components. This accurate FFT analysis approach is based on coherent sampling, but it requires a significantly smaller number of points to make the FFT realization more suitable for on-chip built-in testing and calibration applications that require area and power efficiency. The technique was assessed by comparing the simulation results from the proposed method of single and multiple tones with the simulation results obtained from the FFT of coherently sampled tones. The results indicate that the proper selection of test tone frequencies can avoid spectral leakage even with multiple narrowly spaced tones. When low-frequency signals are captured with an analog-to-digital converter (ADC) for on-chip analysis, the overall accuracy is limited by the ADC's resolution, linearity, noise, and bandwidth limitations. Post-layout simulations of a 16-point FFT showed that third-order intermodulation (IM3) testing with two tones can be performed with 1.5-dB accuracy for IM3 levels of up to 50 dB below the fundamental tones that are quantized with a 10-bit resolution. In a 45-nm CMOS technology, the layout area of the 16-point FFT for on-chip built-in testing is 0.073 ${rm mm}^{2}$, and its estimated power consumption is 6.47 mW.