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Floating Gate Nonvolatile Memory Using Individually Cladded Monodispersed Quantum Dots

机译:使用单独包覆的单分散量子点的浮栅非易失性存储器

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This paper presents nonvolatile memory characteristics of a quantum dot gate floating gate nonvolatile memory (QDNVM) that employs SiOx-cladded silicon quantum dots as discrete charge storage nodes of the floating gate. The cladding of Si quantum dots and control of their size are shown to result in a faster access and improved retention time. The floating gate is formed by site-specific self-assembly of SiOx-Si quantum dots on the tunnel oxide layer over the p-region between source and drain of an n-channel field-effect transistor (FET). Experimental data on fabricated long channel devices show threshold voltage shift as a function of duration and magnitude of the electrical stress applied during the “Write” operation. Current-voltage characteristics (ID-VD and ID-VG) are presented before and after stress. The electrical characteristics are explained using a quantum dot gate FET model which includes the threshold voltage shift (ΔVTH) as a function of charge on the floating gate quantum dots due to applied electrical stress.
机译:本文介绍了量子点栅极浮栅非易失性存储器(QDNVM)的非易失性存储特性,该量子存储采用SiOx包覆的硅量子点作为浮栅的离散电荷存储节点。显示了Si量子点的包覆层及其大小的控制,可加快访问速度并改善保留时间。浮栅是通过在n沟道场效应晶体管(FET)的源极和漏极之间的p区域上方的隧道氧化物层上通过SiOx-Si量子点的特定位置自组装而形成的。在制造的长通道器件上的实验数据表明,阈值电压偏移是“写”操作期间施加的电应力的持续时间和大小的函数。电流电压特性(ID-VD和ID-VG)显示在应力前后。使用量子点栅极FET模型解释电特性,该模型包括由于施加的电应力而导致的阈值电压偏移(ΔVTH)作为浮栅量子点上电荷的函数。

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