Ultrathin body nanowire hetero-dielectric stacked asymmetric halo doped junctionless accumulation mode MOSFET for enhanced electrical characteristics and negative bias stability

摘要

This paper presents a 2-D analytical model of ultrathin hetero dielectric, asymmetric halo doped graded channel (HDGC) nanowire junctionless accumulation mode (JAM) MOSFETs obtained by incorporating the concepts of gate-oxide engineering (i.e., hetero dielectric) and channel engineering (i.e., graded channel) simultaneously. Superposition technique with appropriate boundary conditions has been used to solve Poisson's equation for determining the potential distribution function. The minimum central potential concept has been used to derive the threshold voltage of the HDGC-JAM MOSFETs including the quantum confinement effects. The performance of the proposed device has been compared with that of the uniformly doped JAM-MOSFETs. The proposed model also investigates the effect of control and screen gate length variations on short channel effects (SCEs) and hot carrier effects (HCEs) of the proposed device. Further, an analytical total drain current model considering the effects of gate induced drain leakage (GIDL) at negative bias has also been formulated.