Basics of Clock and Data Recovery Circuits: Exploring High-Speed Serial Links

摘要

The choice of clock and data recovery (CDR) architecture in serial links dictates many of the blocklevel circuit specifications (specs). Block-level specs ultimately determine the energy efficiency of the system. Therefore, to design energy-efficient serial links, it is important to understand the basics of CDR operation, CDR's main performance metrics, and the relationship between circuit-level parameters and system-level performance metrics.