A 31.3-dBm Bulk CMOS T/R Switch Using Stacked Transistors With Sub-Design-Rule Channel Length in Floated p-Wells

摘要

A 31.3-dBm 900-MHz bulk CMOS T/R switch with transmit (TX) and receive (RX) insertion losses of 0.5 and 1.0 dB and isolation of 29 dB is demonstrated. The switch utilizes a floating-body technique, feed-forward capacitors, and 3-stack 3.3-V MOSFETs with 0.26- $mu{hbox {m}}$ sub-design-rule (SDR) channel length. Using these, a 28-dBm 2.4-GHz T/R switch with TX and RX insertion losses of 0.8 and 1.2 dB, and isolation of 24 dB is also demonstrated. The power handling capability is limited by an abrupt output power drop before reaching the normal 1-dB compression point. The circuits are implemented in the UMC 130-nm mixed-mode triple-well CMOS process.