A CMOS pulse-width modulator/pulse-amplitude modulator for four-quadrant analog multipliers

摘要

A CMOS pulse-width modulator/pulse-amplitude modulator (PWM/PAM) has been designed using the Tomota-Sugiyama-Yamaguchi principle. The PWM/PAM has been used to build a four-quadrant analog multiplier (4-QAM) with a DC transfer function that depends only on resistor matching and on the value of a reference voltage. The PWM/PAM circuit was fabricated in a 3- mu m CMOS process; measurements show a small total error (maximum 2% of full scale) without trimming, a high temperature stability (+or-6 ppm/ degrees C), and a low supply voltage sensitivity (+or-25 ppm/%). The total harmonic distortion of the PWM is less than 0.05% (measured for a clock frequency of 200 kHz). Analytic design equations include a DC error model, a stability criterion, and the relation between the maximum bandwidth and the clock frequency.