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Removing Barriers to Low-k Dielectric Adoption

机译:消除低介电常数采用的障碍

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At first, it was the multitude of candidates, none of them ideal, that slowed low-k dielectric progress. Then it was the shifted focus from low-k to implementing copper first in manufacturing. Next, companies tackled the extensive integration issues for low-k dielectrics, including the development of cleaning, CMP, stripping and packaging processes to be compatible with low-k materials. During the past year, the industry became torn between two very different materials: an organic spin-on dielectric and CVD silicon oxycarbide (SiOC:H), also called carbon-doped oxides (CDOs), with manufactura-bility and extendibility to lower k values being of paramount concern. Finally, a combination of the industry downturn and moves to copper and 300 mm led to a conservative approach to low-k material changes, resulting in almost exclusive use of FSG (fluorinated silicate glass) at the 130 nm device node.
机译:起初,是众多候选人(都不是理想人选)减慢了低k介电材料的发展。然后,将重点从低k转移到在制造中首先实施铜。接下来,公司解决了低k电介质的广泛集成问题,包括开发与低k材料兼容的清洗,CMP,剥离和封装工艺。在过去的一年中,该行业陷入了两种截然不同的材料之间:有机旋涂电介质和CVD碳氧化硅(SiOC:H),也称为碳掺杂氧化物(CDO),具有可制造性和可扩展性,可降低k价值观是最重要的。最终,行业低迷并转向铜线和300 mm,导致对低k材料的更改采取了保守的方法,从而导致在130 nm器件节点处几乎完全使用FSG(氟化硅酸盐玻璃)。

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