Wiring Up Silicon Surfaces

摘要

One of the challenges in downsizing electronic circuits is maintaining low resistivity of wires. because shrinking their diameter to near atomic dimensions increases interface effects and can decrease the effectiveness of dopants. Weber et al. (p. 64; see the Perspective by Ferry) created nano-wires on a silicon surface with the deposition of phosphorus atoms through decomposition of PH_3 with a scanning tunneling microscope tip. A brief thermal annealing embedded these nanowires, which varied from 1.5 to 11 nanometers in width, into the silicon surface. Their resistivity was independent of width, and their current-carrying capability was comparable to that of thicker copper interconnects.