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Negative Capacitance Transistors

机译:负电容晶体管

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In recent years, the negative capacitance effect in ferroelectric (FE) materials has attracted significant attention from many researchers around the world. The negative capacitance effect promises to reduce the voltage requirement in conventional complementary metal–oxide–semiconductor transistors below what is otherwise believed to be the Boltzmann limit. In this paper, our objective is to discuss the fundamental underpinning of the negative capacitance effect and describe how it can be utilized for transistors. We shall start with a thermodynamic perspective to understand where the reduction in energy dissipation comes from. We then proceed to derive the S curve in an FE material from fundamental principles. The central result of this paper is to associate the negative slope region in the S curve to a physically definable configuration of dipoles in the crystal structure. The design of a negative capacitance transistor is essentially an exercise of stabilizing the FE in the negative slope region of the S curve using the semiconductor capacitance as a series capacitor.
机译:近年来,铁电(FE)材料中的负电容效应引起了全球许多研究人员的极大关注。负电容效应有望将传统的互补金属氧化物半导体晶体管的电压需求降低到低于被认为是玻耳兹曼极限的水平。在本文中,我们的目的是讨论负电容效应的基本基础,并描述如何将其用于晶体管。我们将从热力学的角度开始,以了解减少能耗的来源。然后,我们从基本原理中推导有限元材料中的S曲线。本文的主要结果是将S曲线中的负斜率区域与晶体结构中偶极子的可物理定义构型相关联。负电容晶体管的设计实质上是一种使用半导体电容作为串联电容器来稳定S曲线负斜率区域中的FE的工作。

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